[CHENG, Wen-Hao 郑文豪, CHENG, Wen-Hao 郑文豪, LIN, Ching-Ko 林清格, CHENG, Wen-Hao 郑文豪, LIN, Ching-Ko 林清格, CHOU, Pin-Hsing 周品兴, CHENG, Wen-Hao 郑文豪, LIN, Ching-Ko 林清格, CHOU, Pin-Hsing 周品兴, TSAI, Yun-Lung 蔡汮龙, CHENG, Wen-Hao 郑文豪, LIN, Ching-Ko 林清格, CHOU, Pin-Hsing 周品兴, TSAI, Yun-Lung 蔡汮龙, LI, Pei-Yu 李珮瑜, CHENG, Wen-Hao 郑文豪, LIN, Ching-Ko 林清格, CHOU, Pin-Hsing 周品兴, TSAI, Yun-Lung 蔡汮龙, LI, Pei-Yu 李珮瑜, SU, Chen 苏城, CHENG, Wen-Hao 郑文豪, LIN, Ching-Ko 林清格, CHOU, Pin-Hsing 周品兴, TSAI, Yun-Lung 蔡汮龙, LI, Pei-Yu 李珮瑜, SU, Chen 苏城, CHANG, Hsiao-Fen 张晓芬] No. 19, Keyuan 2nd Rd., Xitun Dist. 中国台湾省台中市西屯区科园二路19号, TaiwanTaichung City, Taiwan A heating device (1) and a biochemical reactor (2) having the heating device (1) are disclosed. The heating device (1) comprises an upper board (10), a lower board (20), a middle board (30) and an electric heating member (40). Heating holes (13, 23, 33) and accommodating holes (14, 24, 34) are respectively provided in the upper board (10), lower board (20) and middle board (30). The upper, lower and middle holes (13, 23, 33) are communicated with each other to form a heating through hole (50). The upper, lower and middle accommodating holes (14, 24, 34) are communicated with each other to form an accommodating through hole (60). The electric heating member (40) is provided in the accommodating through hole (60), and the two ends thereof are connected with the upper conducting layer (15) of the upper board (10) and the first lower conducting layer (25) of the lower board (20). The biochemical reactor comprises a first body (4), and a second body (5) and the heating device (1) arranged between the first body (4) and the second body (5). Through holes (401,501) are provided on the first body (4) and the second body (5). The through holes (401,501) and the heating through hole (50) are communicated with each other to form a test tube groove for a test tube to insert.

[PENG YU-JIUN, TSAO HSIU-HAO, CHEN SHU-HAN, SYU CHANG-JHIH, YU KUO-FENG, CHEN JIAN-HAO, YU CHIH-HAO, CHANG CHANG-YUN] TW

[Yu-Jiun Peng, Hsiu-Hao Tsao, Shu-Han Chen, Chang-Jhih Syu, Kuo-Feng Yu, Jian-Hao Chen, Chih-Hao Yu, Chang-Yun Chang] TW Hsinchu In an embodiment, a structure includes: a semiconductor substrate; a gate spacer over the semiconductor substrate, the gate spacer having an upper portion and a lower portion, a first width of the upper portion decreasing continually in a first direction extending away from a top surface of the semiconductor substrate, a second width of the lower portion being constant along the first direction; a gate stack extending along a first sidewall of the gate spacer and the top surface of the semiconductor substrate; and an epitaxial source/drain region adjacent a second sidewall of the gate spacer.

[PENG YU JIUN, TSAO HSIU HAO, CHEN SHU HAN, SYU CHANG JHIH, YU KUO FENG, CHEN JIAN HAO, YU CHIH HAO, CHANG CHANG YUN] TW In one embodiment, a structure comprises: a semiconductor substrate; a gate spacer on the semiconductor substrate, wherein the gate spacer has an upper part and a lower part, wherein a first width of the upper part continuously decreases in a first direction extending away from a top surface of the semiconductor substrate, and a second width of the lower part is constant along the first direction; a gate stack extending along a first sidewall of the gate spacer and the top surface of the semiconductor substrate; and an epitaxial source/drain region adjacent to a second sidewall of the gate spacer.

[PENG YU-JIUN, TSAO HSIU-HAO, CHEN SHU-HAN, SYU CHANG-JHIH, YU KUO-FENG, CHEN JIAN-HAO, YU CHIH-HAO, CHANG CHANG-YUN] TW

[Yu-Jiun Peng, Hsiu-Hao Tsao, Shu-Han Chen, Chang-Jhih Syu, Kuo-Feng Yu, Jian-Hao Chen, Chih-Hao Yu, Chang-Yun Chang] TW Hsinchu In an embodiment, a structure includes: a semiconductor substrate; a gate spacer over the semiconductor substrate, the gate spacer having an upper portion and a lower portion, a first width of the upper portion decreasing continually in a first direction extending away from a top surface of the semiconductor substrate, a second width of the lower portion being constant along the first direction; a gate stack extending along a first sidewall of the gate spacer and the top surface of the semiconductor substrate; and an epitaxial source/drain region adjacent a second sidewall of the gate spacer.

[Yu-Jiun Peng, Hsiu-Hao Tsao, Shu-Han Chen, Chang-Jhih Syu, Kuo-Feng Yu, Jian-Hao Chen, Chih-Hao Yu, Chang-Yun Chang] TW Hsinchu In an embodiment, a structure includes: a semiconductor substrate; a gate spacer over the semiconductor substrate, the gate spacer having an upper portion and a lower portion, a first width of the upper portion decreasing continually in a first direction extending away from a top surface of the semiconductor substrate, a second width of the lower portion being constant along the first direction; a gate stack extending along a first sidewall of the gate spacer and the top surface of the semiconductor substrate; and an epitaxial source/drain region adjacent a second sidewall of the gate spacer.

[Yu-Jiun Peng, Hsiu-Hao Tsao, Shu-Han Chen, Chang-Jhih Syu, Kuo-Feng Yu, Jian-Hao Chen, Chih-Hao Yu, Chang-Yun Chang] TW Hsinchu In an embodiment, a structure includes: a semiconductor substrate; a gate spacer over the semiconductor substrate, the gate spacer having an upper portion and a lower portion, a first width of the upper portion decreasing continually in a first direction extending away from a top surface of the semiconductor substrate, a second width of the lower portion being constant along the first direction; a gate stack extending along a first sidewall of the gate spacer and the top surface of the semiconductor substrate; and an epitaxial source/drain region adjacent a second sidewall of the gate spacer.

[PENG YU-JIUN, TSAO HSIU-HAO, CHEN SHU-HAN, SYU CHANG-JHIH, YU KUO-FENG, CHEN JIAN-HAO, YU CHIH-HAO, CHANG CHANG-YUN] TW In an embodiment, a structure includes: a semiconductor substrate; a gate spacer over the semiconductor substrate, the gate spacer having an upper portion and a lower portion, a first width of the upper portion decreasing continually in a first direction extending away from a top surface of the semiconductor substrate, a second width of the lower portion being constant along the first direction; a gate stack extending along a first sidewall of the gate spacer and the top surface of the semiconductor substrate; and an epitaxial source/drain region adjacent a second sidewall of the gate spacer.

[Chang-Jhih Syu, Hsiu-Hao Tsao, Chih-Hao Yu, Yu-Jiun Peng, Chang-Yun Chang] TW Hsin-Chu A system includes a gate formation tool configured to form a sacrificial gate structure and a replacement gate structure, a device dimension measuring tool configured to measure a dimension of the sacrificial gate structure, and a determination unit configured to pick an etching recipe from a series of etching recipes based on the measured dimension of the sacrificial gate structure. The gate formation tool is also configured to partially remove the sacrificial gate structure using the picked etching recipe to form a gate trench for filling the replacement gate structure therein. A portion of the sacrificial gate structure remains in the gate trench, and the series of etching recipes differ at least in a size of the remaining portion of the sacrificial gate structure.