[Shin-Hung Tsai, Chun-Hsiu Chiang, Cheng-Hao Hou, Da-Yuan Lee, Chi On Chui] TW Hsinchu A method includes forming a first electrode, and depositing a dielectric layer over the first electrode. The dielectric layer has a first dielectric constant and a first thickness. A dielectric capping layer is deposited over the dielectric layer. The dielectric capping layer has a second dielectric constant higher than the first dielectric constant, and a second thickness smaller than the first thickness. The method further includes forming a second electrode over the dielectric capping layer, forming a first contact plug electrically connecting to the first electrode, and forming a second contact plug electrically connecting to the second electrode.

[Cheng-Hao Hou, Shin-Hung Tsai, Da-Yuan Lee, Chi On Chui] TW Hsinchu A method includes forming a first capacitor electrode; forming a first oxygen-blocking layer on the first capacitor electrode; forming an capacitor insulator layer on the first oxygen-blocking layer; forming a second oxygen-blocking layer on the capacitor insulator layer; forming a second capacitor electrode on the second oxygen-blocking layer; and forming a first contact plug that is electrically coupled to the first capacitor electrode and a second contact plug that is electrically coupled to the second capacitor electrode.

[Chia-Wei Chen, Chih-Yu Hsu, Hui-Chi Chen, Shan-Mei Liao, Jian-Hao Chen, Cheng-Hao Hou, Huang-Chin Chen, Cheng Hong Yang, Shih-Hao Lin, Tsung-Da Lin, Da-Yuan Lee, Kuo-Feng Yu, Feng-Cheng Yang, Chi On Chui, Yen-Ming Chen] TW Hsinchu A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.

[Cheng-Hao Hou, Che-Hao Chang, Da-Yuan Lee, Chi On Chui] TW Hsinchu In an embodiment, a device includes: a first gate dielectric on a first channel region of a first semiconductor feature; a first gate electrode on the first gate dielectric; a second gate dielectric on a second channel region of a second semiconductor feature, the second gate dielectric having a greater crystallinity than the first gate dielectric; and a second gate electrode on the second gate dielectric.

[Cheng-Hao Hou, Xiong-Fei Yu, Chia-Wei Hsu] TW Hsin-Chu A method and structure for providing conformal doping of FinFET fin structures, for example by way of a thermal treatment process, includes forming a gate stack at least partially over a fin extending from a substrate. In various embodiments, a barrier metal layer is deposited over the gate stack. By way of example, a thermal fluorine treatment is performed, where the thermal fluorine treatment forms a fluorinated layer within the barrier metal layer, and where the fluorinated layer includes a plurality of fluorine atoms. In some embodiments, after forming the fluorinated layer, an anneal is performed to drive at least some of the plurality of fluorine atoms into the gate stack (e.g., into the interfacial layer and the high-K dielectric layer), thereby conformally doping the gate stack with the at least some of the plurality of fluorine atoms.

[HOU CHENG-HAO, CHANG CHE-HAO, LEE DA-YUAN, CHUI CHI-ON] TW

[Yu-En Jeng, Hsiang-Ku Shen, Cheng-Hao Hou, Chen-Chiu Huang, Dian-Hau Chen] TW Hsinchu Structures of a semiconductor device structure are provided. The semiconductor device structure includes a first insulating layer formed over a semiconductor substrate and an interconnect structure formed in the first insulating layer. The semiconductor device structure also includes a second insulating layer formed over the first insulating layer and a capacitor device embedded in the second insulating layer. The capacitor device includes a first capacitor electrode layer electrically connected to the interconnect structure, a capacitor insulating stack formed over the first capacitor electrode layer and a second capacitor electrode layer formed over the capacitor insulating stack. The capacitor insulating stack includes first layers alternatingly stacked with second layers. The dielectric constant of the first layer is different than the dielectric constant of the second layer.

[Cheng-Hao HOU, Xiong-Fei YU] TW Hsinchu A method of making a semiconductor device includes forming a high-k dielectric layer over a substrate; and forming a titanium nitride layer over the high-k dielectric layer. The method further includes performing a silicon treatment on the titanium nitride layer to form at least one silicon monolayer over the titanium nitride layer. The method further includes annealing the semiconductor device to form a TiSiON layer over a remaining portion of the titanium nitride layer.

[Cheng-Hao HOU, Wei-Yang LEE, Xiong-Fei YU, Kuang-Yuan HSU] TW Hsinchu A semiconductor device including a substrate having a source region, a drain region, and a channel region disposed between the source region and the drain region. Additionally, the semiconductor device includes a high-k dielectric layer formed over the channel region, an n-metal formed over the high-k dielectric layer and a barrier layer formed between the high-k dielectric layer and the n-metal, the barrier layer including a layer of annealed silicon.

[CHUI CHI ON, HOU CHENG-HAO, LEE DA-YUAN, LAI PEI YING, CHEN YI HSUAN, XU JIA-YUN] TW